Metal-Oxide Semiconductor Field Effect Transistors (“MOSFETs”) are a common type of power switching device. A MOSFET device includes a source region, a drain region, a channel region extending between the source and drain regions, and a gate structure provided adjacent to the channel region. The gate structure includes a conductive gate electrode layer disposed adjacent to and separated from the channel region by a thin dielectric layer. When a voltage of sufficient strength is applied to the gate structure to place the MOSFET device in an on state, a conduction channel region forms between the source and drain regions thereby allowing current to flow through the device. When the voltage that is applied to the gate is not sufficient to cause channel formation, current does not flow and the MOSFET device is in an off state.
Today's high voltage power switch market is driven by two major parameters: breakdown voltage (“BVdss”) and on-state resistance (“Rdson”). For a specific application, a minimum breakdown voltage is required, and in practice, designers typically can meet a BVdss specification. However, this is often at the expense of Rdson. This trade-off in performance is a major design challenge for manufacturers and users of high voltage power switching devices. Another challenge arises because Power MOSFET devices have an inherent P-N diode between a P-type conductivity body region and an N-type conductivity epitaxial region. This inherent P-N diode turns on under certain operating conditions and stores charge across the P-N junction. When a sudden reverse bias is applied to the P-N diode, the stored charge produces a negative current flow until the charge is completely depleted. The time for the charge to become depleted is referred to as the reverse recovery time (“Trr”) and delays the switching speed of the power MOSFET devices. In addition, the stored charge (“Qrr”) also causes a loss in the switching voltage levels due to the peak reverse recovery current (“Irr”) and the reverse recovery time.
Accordingly, it would be advantageous to have a semiconductor component that has a lower Rdson with a higher breakdown voltage and lower switching losses, i.e., lower Qrr losses, and a method for manufacturing the semiconductor component. It would be of further advantage for the semiconductor component to be cost efficient to manufacture.
For simplicity of illustration and ease of understanding, elements in the various figures are not necessarily drawn to scale, unless explicitly so stated. In some instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present disclosure. The following detailed description is merely exemplary in nature and is not intended to limit the disclosure of this document and uses of the disclosed embodiments. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding text, including the title, technical field, background, or abstract.